RTL Destroyer

logicdestroyer.bsky.social

05 October 2026 03:28

KianV StealthV — my custom quad-core RV32IMA RISC-V SoC on FPGA, running Linux SMP. Fixed-point bounce physics: gravity, impacts, squash and stretch. Four CPU-pinned threads render the floor, shadows and balls, including depth testing, directly to /dev/fb0. Precomputed lighting, no FPU.

Ian Hanschen

furan.bsky.social

18 September 2026 19:27

it's an incredibly elaborate POST card

Ian Hanschen

furan.bsky.social

18 September 2026 08:02

Switching contexts - the assembled ISA-to-HSMC bridge boards arrived from JLCPCB. This will allow an Altera FPGA kit's HSMC port to talk to the bus using an over-spec'd cable for rapid prototyping. Previously I did this for PCI, hopefully this will offer the same flexibility.

RTL Destroyer

logicdestroyer.bsky.social

11 August 2026 16:45

NetBSD is now running on my 32-bit RISC-V KianV ASIC. As far as I can tell, this is the first documented case of NetBSD running on a physical 32-bit RISC-V ASIC. If anyone knows of an earlier one, please let me know. Many thanks to @mith.ro , and @mole99.fosstodon.org.ap.brid.gy

deeempak.bsky.social

05 August 2026 08:39

The baochip x1 is here. @baochip.com I should try out the BIO first. 😃