mralfuture.bsky.social

21 November 2025 01:14

Hey @chrisgammell.bsky.social , I've just caught up on your excellent chat with Tim Ansell @mith.ro in The Amp Hour ep #703. Have you scheduled and executed the 2 hours on the weekend to start your own chip-making journey yet? A remake of the much loved and rare 6580/6581 SID chip perhaps?

Daniel Mangum

danielmangum.com

21 November 2025 01:14

**Interesting SPI Routing with iCE40 FPGAs** I wrote about iCE40 FPGAs, and why the way an FPGA is configured can lead to interesting board design decisions. @mith.ro's Fomu is a useful study due to eschewing a USB-Serial chip for accessing the FPGA and SPI flash. danielmangum.com/posts/spi-ro...

Tholin ΘΔ

tholin.bsky.social

13 October 2025 06:19

I wrote a custom network stack in C to run on my custom silicon RISC-V core, supporting both IPv4 and IPv6 and its now good enough to make HTTP requests. But maybe I'll turn that around and have it accept HTTP requests. We'll see. feat. a really ugly bodge to prevent over-current on the memory bus

David Shadoff

dshadoff.bsky.social

13 October 2025 01:49

I really want @mith.ro 's wafer.space silicon manufacturing shuttles to succeed and continue to be available, so I was trying to brainstorm some retro-computer/console chips which may be viable. Most can be done on FPGA today, but custom silicon could make assembly cheaper (reducing FPGA support).

OSH Park

oshpark.bsky.social

02 October 2025 21:13

Live now! Join @crowdsupply.bsky.social @helenleigh.bsky.social for a conversation with Tim Ansell (@mith.ro) about @wafer.space, a new way for chip designers to easily turn a design into real, working chips: www.youtube.com/watch?v=tEOm... #OpenHardware #OSHW #OpenSilicon #OpenPDK